I interned at Analytical Space Inc. (ASI) in summer 2019 and part-time during my senior year at Harvard with the engineering team. At the time, ASI was a fast-growing pre-series A startup, touted by Forbes as one of 2019’s most innovative startups. The mission is to connect low-Earth orbit to enable faster data throughput from Earth-observation satellites using a mesh relay network of their own satellites.

I primarily worked on two projects, while also assisting efforts in the launch of the company’s second satellite and other ground-based activities. The first project was a data interface hardware and software protocol to allow communication between ASI’s proprietary flight computer protocols, and the hardware from the partner that the company was working with to validate – the FUSE antenna from MITRE. The second project was a hardware and software emulator for on-orbit hardware for use in a ‘flatsat’ ground-based satellite hardware duplicate.

FUSEbridge Adapter

Meshbed is ASI’s second satellite. The 3U CubeSat that launched November 2019. In partnership with MITRE, it features their Frequency-scaled Ultra-wide Spectrum Element (FUSE) phased-array antenna that can electronically steer its radio beam rather than with moving parts. This on-orbit demonstration satellite explored explore U.S. government applications for the MITRE technology and test data relay capability.

As part of the ongoing engineering efforts at ASI and MITRE, there was a need for a device that could bridge the electronic communication protocol of the FUSE antenna with other devices – such as the software defined radio or flight computer – without having to integrate the full ASI software stack. The FUSEbridge tool used the same ASI embedded software tools as on the satellite to accurately simulate how the FUSE antenna behaves on orbit.

ASI had chosen to standardise development around the STM chipset series. ST Microelectronics sells a development board for the chosen chipset called NUCLEO. This allowed me to get up to speed with writing code much faster. Using simple electronic prototyping equipment, I built a functional V1 hardware prototype that allowed me to develop the required software against it. 

I designed a printed circuit board that sits on top of the NUCLEO as a ‘shield’ and was the deliverable. This was used by both the ASI and MITRE engineering teams. While currently it bridges two protocols, the hardware is designed to be a ‘universal bus adapter’ that could allow engineering teams at ASI to more quickly develop the ASI software stack against satellite hardware, without the added burden of building and validating a new hardware configuration.

Hardware Emulator

ASI is in the process of designing and developing its next series of satellites, starting with the Cornicen satellite, which is being developed in conjunction with a partner with existing on-orbit infrastructure. As part of the development of this satellite, as well as ongoing ground testing and verification during the mission, ASI is building a hardware duplicate of the satellite on a bench-top (‘flatsat’). 

In designing the flatsat, several factors must be taken into consideration in order for the flatsat to most accurately reflect the behaviour of the on-orbit hardware configuration. Two important factors from a software development perspective are the power consumption profile and the data interface behaviour of the individual components in different modes of operation. Examples of such hardware include reaction wheels and heaters. However, ASI is unable to procure hardware duplicates of some components, due to contractual limitations with the integrators, practical considerations, or budgetary limitations. I was tasked with accurately emulating the power consumption profile and software behaviour of these components, in order to build a faithful hardware duplicate of the on-orbit configuration, without direct access to these on-orbit hardware duplicate components.

I designed an analog circuit that was able to draw 0 – 0.5A from a 10V bus at 1mA intervals. I also used reference designs from ST Microelectronics to design a PCB with this circuit and an STM32F7 microcontroller on board, to allow for the component’s software interface behaviour to be accurately modelled and for it to be exposed over CAN, I2C, SPI and USART.